July 31, 2017 to August 4, 2017
Fermi National Accelerator Laboratory
US/Central timezone

Front End Digitization of tRPCs in the ATLAS Muon Spectrometer Phase-1 Upgrade

Aug 3, 2017, 10:45 AM
IARC Building (Fermi National Accelerator Laboratory)

IARC Building

Fermi National Accelerator Laboratory

Presentation Particle Detectors Particle Detectors


Xiangting Meng (University of Michigan)


The ATLAS Muon Spectrometer Phase-1 high luminosity upgrade program includes the staging of thin Resistive Plate Chambers (tRPC) to increase trigger acceptance and reduce fake muon trigger rates in the barrel-endcap transition region, corresponding to pseudo-rapidity range 1<|η|<1.3. The tRPC signals will be processed with front-end digitization electronics that make use of the CERN based HPTDC and Gigabyte Optical Link microchips. Low level trigger candidates must be flagged within a maximum latency of 1075 ns, thus imposing stringent signal processing time performance requirements on the readout system in general, and on the digitization electronics in particular. In this talk we report on the design of the tRPC front end digitization electronics. The performance based on both Verilog simulations and measurements using a prototype board under realistic hit rate conditions indicates that the HPTDC in triggerless mode operation satisfies the timing, resolution and power requirements.

Primary author

Xiangting Meng (University of Michigan)


Daniel Levin (University of Michigan) John Chapman (University of Michigan)

Presentation materials