Speaker
Mario D. Balcazar
(University of Kansas)
Description
For the CMS HL-LHC upgrade, a new Inner Tracker will be installed consisting of silicon pixel detector layers in the central region and disks placed in the forward region. A new readout chip will be used along with gigabit optical data links. Proposed designs for the readout chain electronics include a mix of high bandwidth electronic transmission cables and optical links. Until the new custom readout chips are available, a Xilinx Virtex-7 FPGA chip and prototype card will provide functional emulation for studies of the readout chain presented here.
Primary authors
Alice bean
(Univ of Kansas)
Mario D. Balcazar
(University of Kansas)