Mar 18 – 22, 2021
Stony Brook, NY
US/Eastern timezone

Multi-use advanced digital readouts using 3D stacking

Mar 19, 2021, 12:40 PM
Stony Brook, NY

Stony Brook, NY

Online [US/EST Timezone]
Readout & ASICs Readout and ASIC


Richard Younger (MIT LInocln Laboratory)


Recent advances in semiconductor 3D integration technology could enable modularity in sensors: An advanced digital chip may be combined with a separately fabricated analog detector front end and a separate detector. This technology will enable common use of highly capable but expensive digital components across sensing mode (imaging, photon counting, photon timing, etc) and wave band (gamma through LWIR). We report on recent efforts to produce an advanced digital imaging platform in an advanced (14nm) CMOS process as part of the DARPA ReImagine program. We give an overview of status and capabilities of the two digital chips produced to date, organized on Field Programmable Gate Array (FPGA) and System on a Chip (SoC) architectures respectively. We hope to spark a community discussion about potential uses of advanced digital circuitry and digital 3D integration for HEP sensing modalities such as self-triggering, photon counting and timing, and computational imaging.

Primary author

Richard Younger (MIT LInocln Laboratory)

Presentation materials