Name: Ethernet based Readout for FD-VD
Start: 2021-08-02T08:00:00-05:00
End: 2021-08-02T11:00:00-05:00
Location: No location set

- 08:00 → 08:05
  
  Introduction 5m
  
  Speaker: Giovanna Lehmann (CERN)
  
  DAQ Ethernet Intro.pptx
- 08:05 → 08:20
  
  The Vertical Drift Far Detector 15m
  
  Speakers: Francesco Pietropaolo (CERN), Francesco Pietropaolo (CERN)
  
  21-08-02-Vertical_Drift_overview.pdf
- 08:25 → 08:40
  
  Overview of the top electronics readout system 15m
  
  Speaker: Dario Autiero (IPNL)
  
  TDE_data_transmission.pdf
- 08:45 → 08:55
  
  The DUNEDAQ readout system 10m
  
  Speaker: Roland Sipos (CERN)
  
  dunedaq_readout.pdf
- 08:55 → 09:10
  
  Using smart NICs for initial SW driven readout of the VD top electronics 15m
  
  Speaker: Roland Sipos (CERN)
  
  smartNIC_readout_vdtde.pdf
- 09:15 → 09:30
  
  Experience at RAL TD with FW/HW ethernet COTS boards 15m
  
  Speaker: Rob Halsall
  
  RAL-ETHERNET.pdf
- 09:35 → 09:50
  
  Estimated FELIX FW resources required for VD (with FW extensions to Ethernet) 15m
  
  Speaker: Dr Konstantinos Manolopoulos (Rutherford Appleton Laboratory)
  
  DUNE_FLX_fw_resources_VD.pdf
- 09:55 → 10:10
  
  FW platforms for the future 15m
  
  Speakers: Giles Barr (Oxford University), Roy Wastie (University of Oxford)
  
  Workshopv2-1.pdf
- 10:15 → 11:00
  
  Discussion, planning and timelines 45m
  
  Speakers: Alessandro Thea (STFC Rutherford Appleton Laboratory), Giovanna Lehmann (CERN), Roland Sipos (CERN)
  
  DAQ Ethernet Discussion.pptx