Upstream DAQ Tech meeting

Thursday 30 Sep 2021, 07:00 → 08:21 US/Central

 

https://cern.zoom.us/j/68022868314

 

07:00 → 07:15 Current sprint

Consolidation release dunedaq-2.10.0 / FW-2.0.0

Main objectives
- TPG integration
- Ethernet readout (only software for now)

Speakers: Ivana Hristova (STFC RAL), Jim Brooke, Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Dr Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Roland Sipos (CERN), Stoyan Trilov

07:15 → 07:30 Timing

Technical developments & future plans

Speakers: David Cussans (University of Bristol), Stoyan Trilov

Timing systems for PD2

Will need hardware to support the four DAQ systems at CERN

VD CB

HD CB

NP02

Vertical slice

 

However, some of these can use the same timing system

We have the hardware, but need to work out what is needed where and when, which hosts to use for IPBus control and routing of fibres.

F/ware

Working on f/ware for MIB. We can then complete tests of the hardware and hopefully ship to CERN along with AFC+FIB , uTCA power supplies , JSM and MCH.

H/Ware

After the MIB is fully commissioned will need to schedule swap over of ProtoDUNE timing system hardware for prototype DUNE hardware.

Given that we will only have one uTCA crate at CERN we will still need to support ProtoDUNE h/ware in some of the DAQ instances.

 

 

07:30 → 07:45 Readout (FW & SW)

Technical developments & future plans on Readout Subsystem.

Speakers: Antony Earle (University of Sussex), Filiberto Bonini (Brookhaven National Laboratory), Mr Florian Grotschla (CERN), Ivana Hristova (STFC RAL), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Roland Sipos (CERN), Shyam Bhuller (University of Bristol)

Firmware (Kostas)

• For fw release v1.2.0 we've decided to also include the new ipbus v1.1.0
  • K.K and J.S have been redoing all the tests to make sure all the recipes will still work with this new ipbus and updating the documentation
• E.M with KM are working on integrating the Configuration Block. Erdem has verified that the current version is working in stand alone mode but we need to run full tests.

felix-pie

• Found that the phase 2 felix firmware has implemented an additional signal of prog_empty which allows for the decoder/emulator to signal that a full "blocks" worth of data is ready to be readout. The processing pod does not have this and the signals were still routed from the decoder/emulator to the CR which was causing block errors when testing with the wibulator output to the CR
• Also has implications for the input to the processing pod
• A.Thea and K.Kostas discussed with F.Schreuder and decided on integrating a fifo block to the end of the pods output, (after CR Interface), and creating a duplicator block to handle splitting the readout links to the pod inputs

07:45 → 08:00 Trigger Primitives (FW & SW)

Technical developments & future plans on TP specific firmware and software.

Speakers: Antony Earle (University of Sussex), Ivana Hristova (STFC RAL), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Kunal Kothekar

TP readout software (I. Hristova)

- going to push the recent raw WIB TP implementation to the github branch

08:00 → 08:15 Integration

Integration status and upcoming tasks at:
- Neutrino Platform
- CERN DT-DI lab
- Bristol
- UPenn
- ICEBERG

Speakers: Kunal Kothekar, Roland Sipos (CERN), Shyam Bhuller (University of Bristol)

08:15 → 08:20 AOB