Upstream DAQ Tech meeting

Thursday 21 Oct 2021, 07:00 → 08:21 US/Central

 

https://cern.zoom.us/j/68022868314

 

07:00 → 07:15 Current sprint

Operations release dunedaq-2.8.1
- HSI random generation

Consolidation release dunedaq-2.10.0 / FW-2.0.0

Main objectives
- TPG integration
- Ethernet readout (only software for now)

Speakers: Ivana Hristova (STFC RAL), Jim Brooke, Dr Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Roland Sipos (CERN), Stoyan Trilov

 

2.8.1

• Stoyan - testing timing SW/FW  has been done, just need to make MRs (timing and minidaqapp).  

2.10.0

• felix-pie - finished interfaces between dummy pod and FLX phase 2, built and tested.  Can read data from 5 links, and generated data on 6th - no block errors.  Will create tag v1.0.0.
• dtp-firmware - need to update top-level to integrate with felix-pie.
• Once we have a 1-link build with real TPG, work on validation (Kunal) and increasing number of links (Tony) in parallel.
• Ethernet readout - will come to this once 2.8.1 is out

07:15 → 07:30 Timing

Technical developments & future plans

Speakers: David Cussans (University of Bristol), Stoyan Trilov

• Cold Box support:
  • Request for HSI with random triggers delayed us slightly but f/ware written and s/ware support in progress
    • ST will merge changes for random triggers to both develop and master branches and tag master
    • ST will merge s/ware changes and tag
    • We will use the two Enclustra+FMC modules (currently in WR Lab) as HSI hardware
• WR/DTS tests
  • ST setup test on Friday: Have been tagging 1PPS from WR-LEN acting as GPS-DO using a WR-TDC taking timing from WRS which takes timing from DTS endpoint which takes timing from the WR-LEN. Looking at the timing jitter measured should give an indication of end-to-end timing jitter from GPS-DO to Vertical Drift
  • ST will analyse data this week/next.
  • ST will complete tests of looking at 1PPS fed into WRS and 1PPS coming out of WRS. If stable over  number of reboots of WRS then tests will be complete. (The stability of 1PPS into DTS master and then out of DTS endpoint into WRS factorizes. The DTS tests can be done in Bristol ).
    • Bringing forwards purchase of WR equipment to  WR-LEN has been shipped to Bristol and a WRS is being ordered
• MIB
  • AB has sent DC a *.bit file that will allows test of IPBus on MIB SFP
    • DC remarked that an additional design testing IPBus on uTCA backplane will also be needed.
  • AB will proceed with porting fanout to MIB
  • DC will test IPBus link on SFP on Thursday/Friday
  • AB points out that we need to clarify specification. DC agreed and said that there were a number of features discussed at the timing system FDR that we have decided not to implement (e.g. being able to accept timing messages from endpoints for distribution through timing network)
• New hardware at CERN
  • It looks like the VST will be the best place at CERN to test uTCA + MIB + AFC/FIB chain. 
    • Get combination working in Bristol and discuss with rest of DAQ.

 

 

 

07:30 → 07:45 Readout (FW & SW)

Technical developments & future plans on Readout Subsystem.

Speakers: Antony Earle (University of Sussex), Filiberto Bonini (Brookhaven National Laboratory), Mr Florian Grotschla (CERN), Ivana Hristova (STFC RAL), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Roland Sipos (CERN), Shyam Bhuller (University of Bristol)

felix-pie

• Tested updated felix project with debug pod with prog_empty signal and new copy link block
• Wibulator no longer generates block errors when turned on due to correct block size signalling using prog_empty
• copy link block worked for links 0, 2 and 4 but no data seen on links 1 and 3.
• Tracked down to generate statement in copy block not handling 2d array signals properly. Simplified copy block by changing ports to 1d instead of 2d arrays of links and handled conversion in top level
• Tested and all links are seen at CR, and all sinks can read link data
• felix-pie development branch merged and will be tagged v1.1.0
• Next step is to begin integration using dtpc pod

TPG-fw

• Updating Fw spec documentation. Aim is to merge all existing documents into one.
• KK and KM tried retesting the Wib1/Wib2 Data Reception and discovered corrupted dependency files, prob as a result from a merge. Looking into the issue
• CRif including the prog empty axis FIFO tested and updated.

 

Readout software: (Florian)

• Implemented prototype for "zero" copy recording which avoids any extra copy to buffers (in user and kernel space) and writes data directly to disk
• Requires alignment on latency buffer and write sizes and only works with frontends that store data as flat buffers in the latency buffer (i.e. wib, not TPs)
• The first measurements show an additional throughput when recording that is about the size of the incoming data rate and a lot less than previous implementations
• The code needs a good amount of cleanup and error checking (also to check if the configuration of the latency buffer is compatible)
• The results will be presented at one of the upcoming upstream daq meetings

07:45 → 08:00 Trigger Primitives (FW & SW)

Technical developments & future plans on TP specific firmware and software.

Speakers: Antony Earle (University of Sussex), Ivana Hristova (STFC RAL), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Kunal Kothekar

TP readout software

. Profiling of the TP unpacking and stitching in the readout software done earlier
this week

. Discussion with Kunal on the TPG verification and validation procedure

-- Adding comments on the TPG readout software validation
-- We separated software from the TGP firmware to decouple the development
process so that specfic type of TPG software work can be done in parallel to the firmware at the moment
-- We identified, so far, three stages of the validation
1. validation of the first TPG integration into the readout software, it is
done once and will be used many times
2. online: operation monitoring of TPG relevant quantities - using the tools provided
by the dune-daq software framework
3. offline: recording readout data in HDF5 or raw binary files and running offline
analysis on them

08:00 → 08:15 Integration

Integration status and upcoming tasks at:
- Neutrino Platform
- CERN DT-DI lab
- Bristol
- UPenn
- ICEBERG

Speakers: Kunal Kothekar, Roland Sipos (CERN), Shyam Bhuller (University of Bristol)

CERN NP

• Some config issues in network at VD-CB addressed.  Now FLX server is reachable.
• VST is operational.
• NP02 SSPs. Can read out SSPs in dunedaq2.8.1-rc1.  Mike Kirby, Florian, Anas ?
• HD-CB CE experts on site to fix lack of light at FLX input.

CERN DT-DI lab

• setups with Centos8 & Centos7
• Alveo U50 for ethernet DAQ

Bristol

• will get a U50 at some point.  (Sooner than later if we need extra setups, but don't need it urgently atm)

 

08:15 → 08:20 AOB