Energy Efficient and Robust Analog Computation

US/Central
WH2SW (Curia-II)

WH2SW

Curia-II

Description

Analog computing techniques have repeatably demonstrated a 1000x improvement in power or energy efficiency, and a 100x improvement in area efficiency, compared to digital computation.  Multiple analog signal processing functions are a factor of 1000x more efficient than digital processing, such as Vector-Matrix Multiplication (VMM), frequency decomposition, adaptive filtering and classification. Analog computing includes starting the analog computational models, demonstrating and developing analog abstraction and hierarchy, the development of analog architecture theory and algorithmic complexity, and the development of analog numerical analysis.  Analog computation becomes relevant with the advent of large-scale Field Programmable Analog Arrays (FPAA) devices, particularly the SoC FPAA devices and resulting design tools.   The question to address is building a programmable & configurable as well as robust Analog computational framework.   This effort will describe many areas of Analog Computation, the efforts to make it a robust analog computational structure, and the resulting tool framework to enable these directions.  

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      Energy Efficient and Robust Analog Computation

      Analog computing techniques have repeatably demonstrated a 1000x improvement in power or energy efficiency, and a 100x improvement in area efficiency, compared to digital computation. Multiple analog signal processing functions are a factor of 1000x more efficient than digital processing, such as Vector-Matrix Multiplication (VMM), frequency decomposition, adaptive filtering and classification. Analog computing includes starting the analog computational models, demonstrating and developing analog abstraction and hierarchy, the development of analog architecture theory and algorithmic complexity, and the development of analog numerical analysis. Analog computation becomes relevant with the advent of large-scale Field Programmable Analog Arrays (FPAA) devices, particularly the SoC FPAA devices and resulting design tools. The question to address is building a programmable & configurable as well as robust Analog computational framework. This effort will describe many areas of Analog Computation, the efforts to make it a robust analog computational structure, and the resulting tool framework to enable these directions

      Speaker: Jennifer Hasler (Georgia Tech)