Please read these instructions before posting any event on Fermilab Indico

Indico will be down for maintenance on Wednesday, July 17th from 7-7:30 am.

Verilog Modeling of SNSPDs and SiGe ICs for Active Quenching and High-Speed Readout of SNSPDs

19 Jun 2019, 10:10
35m
One West (Wilson Hall)

One West

Wilson Hall

Fermi National Accelerator Laboratory Batavia, IL
HBT

Speaker

Prof. Joseph Bardin (University of Massachusetts)

Presentation materials