Upstream DAQ Tech meeting

Thursday 1 Jul 2021, 07:00 → 08:21 US/Central

 

https://cern.zoom.us/j/68022868314

 

07:00 → 07:15 Current sprint

dunedaq-2.8.0 / FW-2.0.0

Main objectives
- TPG chain
- Ethernet readout (only software for now)

Speakers: Ivana Hristova (STFC RAL), Jim Brooke, Dr Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Roland Sipos (CERN), Stoyan Trilov

Software based TPG ported to dunedaq readout:
https://github.com/DUNE-DAQ/readout/tree/swtpg-port

Unfortunately after 2 superchunks processed, the TPG doesn't produce more hits. To be investigated.

 

07:15 → 07:30 Timing

Technical developments & future plans

Speakers: David Cussans (University of Bristol), Stoyan Trilov

Hardware

• uTCA crate has arrived at CERN. We need a plan to get it installed at NP04. Needed ~ August when it will be used with a AFC+FIB as timing master.
• Ten new reference hardware timing FMCs ( pc053d ) available for dispatch to groups that need to develop an interface to the timing system
  • One is due to be shipped to HD calibration laser group ( Nuno Baras ) as soon as it is tested

Firmware/Software

• Concentrating on features for 2.8
  • FIB+AFC support in firmware and software
  • Ability to produce both 62.5MHz and 50 MHz build support in firmware and software done
  • PD-I fanout unit support in timing lib
• Test automation script under development

• Need to confirm firmware+hardware combinations do we need to support on what timescale

  • COLDBOX (+HSI) with existing timing hardware

  • uTCA FIB+AFC August/September (?)

Integration

• WR / DTS  clock stability tests being finalized.
• Will need RARPD when 2.8 firmware installed at NP04

 

07:30 → 07:45 Readout (FW & SW)

Technical developments & future plans on Readout Subsystem.

Speakers: Antony Earle (University of Sussex), Filiberto Bonini (Brookhaven National Laboratory), Mr Florian Grotschla (CERN), Ivana Hristova (STFC RAL), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Roland Sipos (CERN), Shyam Bhuller (University of Bristol)

felix-pie (A.Thea, A.Earle)

• Register map modification merged into main felix repo so have now implemented a ipbus_regmap_bridge module to allow communication
• Tested on VC709 and shown working with ipbus test module integrated
• Currently attempting same exercise on flx712 card, (bitfile built successfuly, currently testing)
• to-do tasks are:
  • Request an update to the regmap library
  • Request a new felix package 
  • Integrate the ipbus_regmap_bridge into DUNE-DAQ package
  • Add area constraints to felix-ipbus design
  • Look into forking axis bus to CR to feed the processing block
  • Add processing block to design

 

firmware (K. Manolopoulos)

• we are preparing for the intermediate fw release v.1.2.0
  • will include the change to 32baxis format at the input and output of the HF processing chain
• changes in dtp-sim and dtp-controls fixed and verified (Ivana and Tony)
• changes at the output part of the chain verified with the automated test
• changes at the input verified manually and currently working on the automated script (Erdem)  
• aim is to tag all gitlab repos by end of today and run hw tests on Friday

07:45 → 08:00 Trigger Primitives (FW & SW)

Technical developments & future plans on TP specific firmware and software.

Speakers: Antony Earle (University of Sussex), Ivana Hristova (STFC RAL), Konstantinos Manolopoulos (Rutherford Appleton Laboratory), Kunal Kothekar

08:00 → 08:15 Integration

Integration status at:
- CERN
- Bristol
- UPenn
- ICEBERG

Speakers: Kunal Kothekar, Roland Sipos (CERN), Shyam Bhuller (University of Bristol)

  Bristol Test Stand:

What has been done:

 - Tried readout from the FELIX using the internal FELIX emulator as a data source, found that dataflow was not starting (using daq_application and app_confgen.py in flxlibs). Tested at both the Bristol test stand and np04, both giving the same result

 To do tasks are:

 - try readout from the FELIX using pexinit firmware and pure 2.6.0 i.e. felix v1_1_1, keeping emulator the same

 - try readout from the FELIX using the ZCU102 as a data source

 - testing and recording waveforms with the ILA debug design.

 - testing the hit-finder release on zcu102 ( release expected end of the week.)

 - Verification and validation proposal/document ( under preparation)

 

 

08:15 → 08:20 AOB