Name: DUNE PRR: FD1 TPC Electronics (Cold ASICs+FPGA)
Start: 2023-05-08T07:30:00-05:00
End: 2023-05-09T10:20:00-05:00
Location: Zoom

DUNE PRR: FD1 TPC Electronics (Cold ASICs+FPGA)

from Monday, 8 May 2023 (07:30) to Tuesday, 9 May 2023 (10:20)

Monday, 8 May 2023

07:30 Executive Sessions
Executive Sessions
07:30 - 08:00
See email for the Zoom link for the Executive Session
08:00 Overiew - Cheng-Ju Lin (Lawrence Berkeley National Laboratory)
Overiew
- Cheng-Ju Lin (Lawrence Berkeley National Laboratory)
08:00 - 08:30
08:30 ColdADC and COLDATA - David Christian (Fermilab)
ColdADC and COLDATA
- David Christian (Fermilab)
08:30 - 09:00
09:00 ASIC Lifetime Studies - Jianming Bian (University of California, Irvine)
ASIC Lifetime Studies
- Jianming Bian (University of California, Irvine)
09:00 - 09:20
09:20 Frontend Motherboard Testing - Shanshan Gao (Brookhaven National Laboratory)
Frontend Motherboard Testing
- Shanshan Gao (Brookhaven National Laboratory)
09:20 - 09:50
09:50 Break
Break
09:50 - 10:05
10:05 Warm Interface Board and FPGA - Hucheng Chen (Brookhaven National Lab)
Warm Interface Board and FPGA
- Hucheng Chen (Brookhaven National Lab)
10:05 - 10:30
10:30 CERN Cold Box and ProtoDUNE-II - Roger Huang (Lawrence Berkeley National Laboratory)
CERN Cold Box and ProtoDUNE-II
- Roger Huang (Lawrence Berkeley National Laboratory)
10:30 - 10:50
10:50 ASIC QC Teststand - Dean Shooltz (MSU) Shanshan Gao (Brookhaven National Laboratory)
ASIC QC Teststand
- Dean Shooltz (MSU)
- Shanshan Gao (Brookhaven National Laboratory)
10:50 - 11:20
11:20 ColdADC/COLDATA Production Plan (Cost and Schedule) - Cheng-Ju Lin (Lawrence Berkeley National Laboratory)
ColdADC/COLDATA Production Plan (Cost and Schedule)
- Cheng-Ju Lin (Lawrence Berkeley National Laboratory)
11:20 - 11:35
11:35 Daily wrap up (Committee only)
Daily wrap up (Committee only)
11:35 - 11:50
Tuesday, 9 May 2023

08:00 Q/A
Q/A
08:00 - 10:00