DUNE PRR: FD1 TPC Electronics (Cold ASICs+FPGA)

8 May 2023, 07:30 → 9 May 2023, 10:20 America/Chicago

Zoom

Cheng-Ju Lin (Lawrence Berkeley National Laboratory), David Christian (Fermilab), Eric James (Fermi National Accelerator Lab), Philippe Farthouat (CERN)

Production Readiness Review of the DUNE FD1 TPC Electronics (Cold ASICs+FPGA)

Review Links

Review Home

Charge Letter

Committee final Report

ASIC-FPGA_PRR_Document_Guide_v2.xlsx

Review Documentation

Monday, 8 May

07:30 → 08:00 Executive Sessions

See email for the Zoom link for the Executive Session

08:00 → 08:30 Overiew

Speaker: Cheng-Ju Lin (Lawrence Berkeley National Laboratory)

PRR_ASICs-FPGA_Overview_05-07-2023.pdf

08:30 → 09:00 ColdADC and COLDATA

Speaker: David Christian (Fermilab)

ColdADC_and_COLDATA(PRR).pdf

ColdADC_and_COLDATA(PRR).pptx

09:00 → 09:20 ASIC Lifetime Studies

Speaker: Jianming Bian (University of California, Irvine)

20230508@PRR-ColdADCLifetime_v1.pdf

09:20 → 09:50 Frontend Motherboard Testing

Speaker: Shanshan Gao (Brookhaven National Laboratory)

DUNE FEMB QAQC_v2.pdf

09:50 → 10:05 Break

10:05 → 10:30 Warm Interface Board and FPGA

Speaker: Hucheng Chen (Brookhaven National Lab)

WIB-FPGA.20230508.pdf

WIB-FPGA.CD-3A.pdf

10:30 → 10:50 CERN Cold Box and ProtoDUNE-II

Speaker: Roger Huang (Lawrence Berkeley National Laboratory)

ColdboxTestResults_PRR.pdf

10:50 → 11:20 ASIC QC Teststand

Speakers: Dean Shooltz (MSU), Shanshan Gao (Brookhaven National Laboratory)

DUNE ASIC Test-Stand.pdf

DUNE ASIC Test-Stand.pptx

robot-demo.mp4

RTS-swap16-2048k.mp4

11:20 → 11:35 ColdADC/COLDATA Production Plan (Cost and Schedule)

Speaker: Cheng-Ju Lin (Lawrence Berkeley National Laboratory)

PRR_ASICs-FPGA_ProductionPlan_05-07-2023.pdf

11:35 → 11:50 Daily wrap up (Committee only)

Tuesday, 9 May

08:00 → 10:00 Q/A