Conveners
Computational III
- Daisy Kalra (Columbia University)
Over the past decade, functional verification of IP or ASIC/SoCs has been dominated by the SystemVerilog-based Universal Verification Methodology (UVM), which, while offering benefits like reusability and modularity, often adds significant overhead in terms of project costs and deadlines. This is particularly challenging for High Energy Physics (HEP) projects, which require time-constrained...
With the ever-increasing demand for high beam power, the currently used beam-intercepting devices (BIDs) such as targets, and beam windows may not be able to handle the high power required for future accelerator complexes or the lifetime may be reduced drastically. As beam power increases, the damage incurred by BIDs, including thermal shock, fatigue, and irradiation damage, also rises....