Towards timing @ NP02
FIB v2 hardware commissioning/firmware debugging
FIB v2 low level support+high level integration (mostly testing)
IRIG block firmware code and address map review
IRIG block software integration
Software integration (low+high level) of refactored timestamp initialisation firmware on GIB and MIB
Complete 0th order OKS transition:
- Test new clock configuration scheme
- Test of OKS config using MIB
- Test of OKS config using MIB+FIB
- Integration with drunc: custom FSM, custom commands
- HSI schema review, implementation, and testing
OKS configuration follow-up
- Schema for DTS hardware HSI readout
- Refactor network connections (may form part of larger overall schema refactor)
- GIB support in high-level software (either through minimal schema changes, or schema refactor)
Configuration schema refactor (towards DTS service software prototype)
- Add multiple GIB support
- Add support for upstream source selection
- Add multiple MIBs support