DAQ Coordination Meeting

Monday 9 Dec 2024, 08:00 → 09:30 America/Chicago

 https://fnal.zoom.us/j/369714575

1 General news

Speakers: Alessandro Thea (STFC Rutherford Appleton Laboratory), Asher Kaboth (RHUL), Roland Sipos (CERN)

2 Actions from previous meetings

Speakers: Alessandro Thea (STFC Rutherford Appleton Laboratory), Asher Kaboth (RHUL), Roland Sipos (CERN), Wesley Ketchum (Fermi National Accelerator Laboratory)

3 Run Coordination news

Speaker: Wesley Ketchum (Fermi National Accelerator Laboratory)

4 Activity coordination round table

Release Coordination v5
Iceberg
ND test setups
SW coordination

Speakers: Bonnie King (FNAL), Eric Flumerfelt (Fermilab), John Freeman, Kurt Biery (Fermilab)

John, Software Coordination:

• Ready to cut fddaq-v5.2.1 when needed
• Still working on updating externals. Progress slow but steady (https://github.com/DUNE-DAQ/daq-release/wiki/Externals-Survey); a couple of hiccups when trying to build with gcc 13.2.0 rather than 12.1.0 (e.g., complaints about missing <cstdint> headers in pistache, etc.)
• At the Software Coordination meeting on Thursday, Pierre brought up the idea of running automated unit tests as part of a nightly not just for the C++ DUNE DAQ packages (dbt-build --unittest) but also for the Python packages

5 Working groups round table

Speakers: Adam Barcock (UKRI STFC), Alec Habig (Univ. of Minnesota Duluth), Alexander Tapper (Imperial College London), Artur Sztuc (University College London), Bonnie King (FNAL), David Cussans (University of Bristol), Jonathan Hays (Queen Mary University of London), Joshua Klein, Kurt Biery (Fermilab), Pierre Lasorak (Imperial College London), Roland Sipos (CERN), Stoyan Trilov, Wesley Ketchum (Fermi National Accelerator Laboratory)

CCM

Control

• FSM schema (drunc side) progress
• Investigation of timeouts in booting
• ERS &  Opmon integration restarts
• Controller and process manager GUI prototypes available -- test at NP

Config

• Second session of configuration mini-workshop completed

• Light python reader for xml developed for offline software group

• Prototype configuration TUI (cider) and other inspection tools merged

• Development of demo of git configuration management for NP02

• Development of demo of cider shift tool for NP02.

Monitoring

• None

Timing System

 

Work Package	Tasks	Update from last 2 weeks (what activities were completed related to this task)	Scheduled next 2 weeks (what activities are planned related to this task)	Status	Forecasted End Date   (Update in brackets)
1.1.2 Support CERN operations	Preparation for NP02 running.	Jose Soto/FNAL (BERN CRT) has been lent a reference hardware FPGA+FMC. Proposal is to use hardware 1PPS signals to synchronize (and possibly an additional synchronization signal) After discussion with Jean-Sebastien Real proposal is to synchronize Grenoble CRT using IRIG-B and 10MHz from a GPS source ( even if not same source as used for DTS will be less than ~ +/- 50ns time jitter) Fanout unit (with replaced fans) back at 50l setup.	Continue gathering list of timing endpoints. Continue commissioning GIB and connected fanout unit at CERN. Set up GPS-DO --> GIB --> Fanout chain to provide timing for NP02 (replace with GPS-DO --> GIB --> MIB --> AFC/FIB when available)	On-track	01/01/25
	Consolidate DTS-WR interface	No update, still waiting response to E-mail to TDE. Work to produce new WR-DTS interface firmware (combine HSI and WR firmware into one design) not started; TDE integration not due until EOY.	Re-engage with VD TDE.	Delayed	1/8/24  (New date uncertain)
Other support	Timing Units for CRP factories	Timing units for CRP factories not needed until late next year.  Need to port to different FPGA carrier board (Enclustra units go EOL at the end of the month and funding difficult to purchase sufficient units for total needs, which includes setting up test stand for production testing)	Understand requirements for further units, understand budget constraints	On-Track	15/12/24
1.1.3 Legacy Software	Integrating timing with DUNEDAQ 5.x	Endpoint monitoring features merged to v5.2.1 branches   DTS-HSI opmon (re)integration started	Continue development of DTS-HSI work  Plan out v5.2.1/v5.3.0 work	On-Track	15/12/24-v5.2.1 release date
1.3.3.1 MIB Code development/block integration	Timestamp initialisation from upstream	MIB firmware initial testes complete, building up software support for new features	Complete testing and development, merge upstream	On-track	16/12/2024  (09/12/2024)
1.3.1.1 IRIG decoding firmware	Consolidation	[No update] waiting on other firmware tasks	Implement TAI epoch in firmware and software	On-Hold	23/12/24
1.3.1.2 Fine delay measurement	Firmware block development	Work started following addition of FIB v2 firmware support	Design firmware inter -block interfaces. Design firmware-software interface   Integrate fine phase prototype blocks into MIB v2 and AFC designs	On-track	16/12/24
1.3.6 MIB MMC firmware	Consolidate MIB MMC firmware	Continuing debugging discussion with NAT	Debug hot-swap operation  N.B. We could still operate DUNE without hot-swap ability on MIB by power-cycling crate so on hold for now	On-hold	(new date uncertain)

 

1.4.2.1 Timing Service specifications capture	Gain document approval	ST and Pierre presented control proposal and requirements	Update requirements following presentation, seek approval	Delayed	09/12/24  (23/12/24)
1.2.3.1 FIB pre-production prototype	FIB commissioning	FIB v2 initial testing complete, feature branches merged	Complete detailed testing of hardware components	Delayed	02/12/24  (23/12/24)
1.2.1.1 GIB pre-production prototype	1.2.1.1.4  GIB v2 layout, prep for manufacture and dispatch	Two quotes received. Discovered issue with component availability. Changed component. Raised requisition.	Wait for order confirmation with delivery time. Update planning	Delayed	22/11/24  (16/12/24)
1.2.2.1 MIB pre-production prototype	1.2.2.1.5 MIB pre-production hardware manufacture	Issues with adding chosen supplier to SBS database. Combination of staff sickness at Hi5 and SBS/STFC slowness. Supplier added to SBS database. Order received and acknowledged	Completed		3/12/24
	MIB tongue 2 design	[No update]	Design new tongue 2	On-track	23/12/24
1.7.2.4 “COTS” procurement	1.7.2.4.1 - Quote for AFCs	Waiting for delivery	NA	Complete
	Understand medium term hardware requirements	Discussion around Enclustra EOL in 2024	Make decision on GIB FPGA choice, understand requirements on other Enclustras	On-track	23/12/24
1.7.2.1 procure uTCA items	Evaluate new uTCA crate.	[No update]	Test clock and data fanout	On-track	23/12/24
1.6.3 Production Readiness Review preparation	Date and schedule agreement	UK schedule up to PRR and hardware tasks up to installation updated.Submitted to UK management for comment/update/approval	Update firmware/software tasks in planning. Integrate with consortium planning	Delayed	25/11/24  (23/12/24)

 

Trigger:

• Now possible to disable TA/TC-making in the trigger with one bool, without impacting the input TP/TA buffering.
• Porting of the replay application from v4 to v5 almost complete, discussions about future rewrite & replay framework began.
• Prototype rewrite of the offline trigger emulation ongoing and 70% complete: can now emulate multiple APAs from multiple tpstreams.
• Ongoing work on the PDS TPs. Most work done in v4, now being ported and tested into v5 framework. Offline tests to begin soon, testing with replay once replay port complete.
• TPG: minimum Time Over Threshold added. We can now require e,g, minimum of 3 ticks over thresholds to create a TP to remove more noise. PR in progress.
• Ongoing studies:
  • GroundShake studies: currently two separate analyses ongoing, one showing a change in the trigger rates before-after we started collecting beam data, and another showing no evidence of the change in the rate of ground shakes. Studies ongoing.
  • Ongoing effort on reproducing the particle triggering efficiency plots from doc-11215. Initially will use the currently-existing simple triggering algorithms algorithms, and will move to more complex ideas as needed.
• Planning trigger workshop: 7th April to (potentially) 11th April, at CERN. 2-3 days to discuss trigger algorithms and trigger system with its deficiencies, remaining 2-3 days for a hackathon to prototype solutions. Thoughts?

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