Speaker
Dr
Stephan DURR
(University of Wuppertal)
Description
A simple minded approach to implement three discretizations of the Dirac operator (Brillouin, Wilson, staggered) on two architectures (KNL and core_i7) is presented. The idea is to use a high-level compiler along with OpenMP parallelization and SIMD pragmas, but to stay away from cache-line optimization and/or assembly-tuning. The implementation is for Nv right-hand-sides, and this extra index is used to fill the SIMD pipeline. On one KNL node single precision performance figures for Nc=3, Nv=12 read 640 Gflop/s, 320 Gflop/s, and 520 Gflop/s for the three discretization schemes, respectively.
Primary author
Dr
Stephan DURR
(University of Wuppertal)