LAPPD2 Electronics Godparent Review

Saturday 6 Apr 2013, 08:30 → 13:30 US/Central

A-224 (Argonne, Building 360)

Kurtis Nishimura (SLAC), Ted Liu (Fermilab)

LAPPD2 Electronics Godparent Review

Welcome & Introduction

1 Welcome & Charge

Digitization

2 Overview: Goals, Specs for Five Applicaations, Resources, & Progress Since Last GP Review

Speaker: Gary Varner (UHawaii)

Slides LAPPD2_Electronics_overview_Apr2013.pdf

3 What We Learned from PSEC-4

Speaker: Eric Oberla (UChicago)

Slides 2013_4_6_godparent1_compressed.pdf

4 Can We Use IRS3b or Other Existing Chips

Speaker: Gary Varner (UHawaii)

Slides IRS3B_otherASICs_Apr2013.pdf

5 PSEC-5

Speaker: Eric Oberla (UChicago)

Slides 2013_4_6_godparent2_compressed.pdf

6 Questions to Be Decided

Assignments of Chips to Applications? IBM vs TSMC Simulation of Blocks Task Assignments? Proposals, Schedule

Speaker: Ted & Kurtis, leaders Discussion

11:00 Coffee Break

Systems

7 System Architecture for PSEC-4

Speaker: Eric Oberla (UChicago)

Slides 2013_4_6_godparent3_compressed.pdf

8 Alternative Architectures I

Speaker: Gary Varner (UHawaii)

Slides AlternativeSystemArchitectureI.pdf

9 Alternative Architectures II

Speaker: Mircea Bogdan (UChicago)

Slides AlternativeSystemArchitectureII.pdf

10 Questions to Be Decided

Speaker: Ted & Kurtis, leaders Discussion

11 Drafting of Recommendations & Working Lunch

Speaker: GP Committee & Proponents